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clm5.0/cime_config/testdefs/testlist_clm.xml
baoliang b144ce570d first commit
2025-01-12 20:48:10 +08:00

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<?xml version="1.0"?>
<testlist version="2.0">
<test name="ERI_D_Ld9" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld9" grid="f09_g17_gl4" compset="I1850Clm50BgcNoAnthro" testmods="clm/decStart1851_noinitial">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="1x1_camdenNJ" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="f09_g16" compset="I1850Clm45BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="ne30_g16" compset="I2000Clm50BgcCruGs" testmods="clm/vrtlay">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:60:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="T31_g37" compset="I2000Clm50Sp" testmods="clm/SNICARFRC">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9" grid="f09_g16" compset="I1850Clm50Sp" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld9" grid="f09_g16" compset="I1850Clm50SpCru" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld3" grid="f09_g17" compset="I2000Clm50SpGs" testmods="clm/prescribed">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include a test of prescribed soil-moisture, has to be at f09, should be 2000 and for SP</option>
</options>
</test>
<test name="ERI_D_Ld9_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/reduceOutput">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_D_Ld9_P48x1" grid="T31_g37" compset="I2000Clm50Sp" testmods="clm/reduceOutput">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERI_D_Ld9_P48x1" grid="f10_f10_musgs" compset="I2000Clm50Sp" testmods="clm/SNICARFRC">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f09_g17" compset="I1850Clm50Bgc" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5_P512x2" grid="f19_g16" compset="I2000Clm50SpGs" testmods="clm/waccmx_offline">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f09_g17" compset="I2000Clm50BgcCruGs" testmods="clm/cn_conly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f09_g17" compset="I2000Clm50BgcCruGs" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_Ld9" grid="f45_g37" compset="I2000Clm50BgcCruGs" testmods="clm/nofire">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERI_N2_Ld9" grid="f19_g17" compset="I2000Clm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D" grid="f10_f10_musgs" compset="IHistClm50Bgc" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld3_P64x2" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f19_g17_gl4" compset="I1850Clm50BgcCrop" testmods="clm/glcMEC_changeFlags">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f19_g17_gl4" compset="I1850Clm50BgcCropG" testmods="clm/glcMEC_changeFlags">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="IHistClm50BgcCrop" testmods="clm/allActive">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment">Use a transient compset so we allocate and run all PFTs (non-transient cases only allocate memory for non-zero-weight PFTs)</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/NoVSNoNI">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/rootlit">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/ciso_flexCN_FUN">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f19_g17" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f19_g17" compset="I2000Clm50BgcCruGs" testmods="clm/fire_emis">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Sp" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Sp" testmods="clm/reduceOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f09_g17" compset="I2000Clm50Vic" testmods="clm/vrtlay">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Vic" testmods="clm/vrtlay">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f19_g17" compset="IHistClm50SpCru" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5_P48x1" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/ciso">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld10_P64x2" grid="f10_f10_musgs" compset="IHistClm50BgcCrop" testmods="clm/ciso_decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient case with isotopes with a december start</option>
</options>
</test>
<test name="ERP_D_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/reduceOutput">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50Sp" testmods="clm/o3">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld9" grid="f19_g17" compset="I2000Clm50Cn" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="clm_short"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/rain_to_snow_runs_off">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm">
<options>
<option name="wallclock">00:20:00</option>
</options>
</machine>
</machines>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/cropColdStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/flexCN_FUN">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/noFUN_flexCN">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/luna">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld30" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
<option name="comment" >NOTE(bja, 201509) constrain_stress_deciduous_onset is on by default for clm50, but functionality is not exercised by nine day tests, Sean Swenson verified that it is active during 30 day tests.</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/irrig_spunup">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Want ERP _D test with irrigation on</option>
</options>
</test>
<test name="ERP_D_P64x2_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCropRtm" testmods="clm/irrig_spunup">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include an irrigation test with RTM to test irrigation-river feedbacks with that component</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCropRtm" testmods="rtm/rtmOnFloodOnEffvelOn">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Do a test with RTM and flooding on as that also impacts CLM code</option>
</options>
</test>
<test name="ERP_D_P48x1" grid="f10_f10_musgs" compset="IHistClm50Bgc" testmods="clm/decStart">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/drydepnomegan">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f19_g17" compset="I1850Clm50Bgc" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f19_g17" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f19_g17" compset="I2000Clm50SpRtmFl" testmods="clm/default">
<machines>
<machine name="izumi" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="intel" category="prebeta"/>
<machine name="izumi" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f09_g17" compset="I2000Clm50Vic" testmods="clm/vrtlay">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Vic" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/ciso">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5" grid="f09_g17" compset="I1850Clm50BgcCropCru" testmods="clm/ciso">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/default">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/reduceOutput">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/flexCN_FUN">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/noFUN_flexCN">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld5_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/luna">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ly3_P64x2" grid="f10_f10_musgs" compset="IHistClm50BgcCrop" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Multi-year global test of transient crops together with transient glaciers. Use no-evolve glaciers with ERP test</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f09_g17" compset="I2000Clm45Sp" testmods="clm/prescribed">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a debug threaded test of I2000Clm45Bgc with prescribed streams on (has to be f09 for prescribed)</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm45BgcCru" testmods="clm/ciso">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm45Cn" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/ciso">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm45Sp" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a debug test of I2000Clm45Sp</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Cn" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include a few debug tests of Cn</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="IHistClm45BgcCruGs" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a debug test of IHistClm45BgcCruGs</option>
</options>
</test>
<test name="ERP_D_Ld5" grid="f10_f10_musgs" compset="IHistClm45SpGs" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_Lm13" grid="f10_f10_musgs" compset="IHistClm50Bgc" testmods="clm/monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">02:00:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="ERP_P256x2_D" grid="f19_g17" compset="I2000Clm50SpRtmFl" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a debug test with flooding on</option>
</options>
</test>
<test name="ERP_P256x2_D_Ld5" grid="f19_g17_gl4" compset="I1850Clm50BgcCropG" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P256x2_D_Ld5" grid="f19_g17_gl4" compset="I1850Clm50BgcCropG" testmods="clm/glcMEC_increase">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >cism is not answer preserving across processor changes, but short test length should be ok.</option>
</options>
</test>
<test name="ERP_P256x2_D_Ld5" grid="f19_g17" compset="I2000Clm50BgcDvCrop" testmods="clm/crop">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P256x2_D_Ld5" grid="f19_g17" compset="I2000Clm50Sp" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_P256x2_D_Ld5" grid="f19_g17" compset="I2000Clm50Sp" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_cime_baselines"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_Lm25" grid="f10_f10_musgs" compset="I2000Clm50BgcDvCrop" testmods="clm/monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm45BgcCrop" testmods="clm/crop">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a debug test of I1850Clm45BgcCrop</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="ERP_P64x2_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm45BgcCru" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_P64x2_Lm25" grid="f10_f10_musgs" compset="I2000Clm50BgcDvCrop" testmods="clm/monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:20:00</option>
</options>
</test>
<test name="ERP_P64x2_Ly3" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/irrig_o3_reduceOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Want a multi-year global crop restart test; this was 5 years when we were doing cold start, but 3 years is probably sufficient given that we have spun-up crop initial conditions</option>
</options>
</test>
<test name="ERP_P64x2_Lm36" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/clm50cropIrrigMonth_interp">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Want a multi-year global crop restart test; this was 5 years when we were doing cold start, but 3 years is probably sufficient given that we have spun-up crop initial conditions</option>
</options>
</test>
<test name="ERS_D" grid="f19_g17" compset="I1850Clm50BgcCrop" testmods="clm/reseedresetsnow">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld10" grid="f10_f10_musgs" compset="IHistClm50SpG" testmods="clm/glcMEC_decrease">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >test transient PFTs (via HIST) in conjunction with changing glacier area</option>
</options>
</test>
<test name="ERS_D_Ld12" grid="f10_f10_musgs" compset="I1850Clm50BgcCropG" testmods="clm/glcMEC_spunup_inc_dec_bgc">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Tests updates of BGC variables with increasing and decreasing glacier areas</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f19_f19_mg16" compset="I1850Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f09_g17_gl4" compset="I1850Clm50BgcCrop" testmods="clm/clm50KitchenSink">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="clm_short"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f19_g17_gl4" compset="I1850Clm50BgcCrop" testmods="clm/clm50dynroots">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f19_f19_mg16" compset="I2000Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/deepsoil_bedrock">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f19_f19_mg16" compset="IHistClm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5_Mmpi-serial" grid="1x1_mexicocityMEX" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld6" grid="f10_f10_musgs" compset="I1850Clm45BgcCrop" testmods="clm/clm50CMIP6frc">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld7_Mmpi-serial" grid="1x1_smallvilleIA" compset="IHistClm50BgcCropGs" testmods="clm/decStart1851_noinitial">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient crop run with a mid-year restart, restarting shortly after a big landunit transition, to make sure that the annually-dribbled fluxes generated from landunit transitions restart properly</option>
</options>
</test>
<test name="ERS_Ld3" grid="f19_f19_mg16" compset="I1850Clm40SpGswGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld3" grid="f09_g17" compset="I1850Clm50BgcCrop" testmods="clm/rad_hrly_light_res_half">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld3" grid="f19_f19_mg16" compset="I2000Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld3" grid="f19_f19_mg16" compset="IHistClm40SpGswGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld5_Mmpi-serial" grid="1x1_vancouverCAN" compset="I1PtClm45SpGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld5_Mmpi-serial" grid="1x1_vancouverCAN" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Lm20_Mmpi-serial" grid="1x1_smallvilleIA" compset="I2000Clm50BgcCropQianGs" testmods="clm/monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:20:00</option>
<option name="comment" >tests mid-year restart, with the restart file being written in the middle of the first year; 12-15-2017: now that we generally use init_interp, this test needs to be changed to point to a blank finidat file to truly test mid-year restart in the first year</option>
</options>
</test>
<test name="ERS_Lm40_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcCropQianGs" testmods="clm/monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">02:00:00</option>
<option name="comment" >tests mid-year restart, with the restart file being written in the middle of the second year</option>
</options>
</test>
<test name="ERS_Lm54_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >tests mid-year restart, with the restart file being written after more than 2 years, which Sam Levis says is important for testing crop restarts</option>
</options>
</test>
<test name="ERS_Ly20_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcDvCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="ERS_Ly3" grid="f10_f10_musgs" compset="I1850Clm50BgcCropCmip6" testmods="clm/basic">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Include a long ERS test of the cmip6 configuration, though at coarse resolution. This gives a year+ test covering the output_crop usermod, which is something we want: if this is removed, we should add a test of at least a year duration covering the output_crop usermod. This test needs to use init_interp to work, because of adding virtual Antarctica columns (currently the default out-of-the-box setting uses init_interp for this).</option>
</options>
</test>
<test name="ERS_Ly3" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/clm50KSinkMOut">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
</options>
</test>
<test name="ERS_Ly3_Mmpi-serial" grid="1x1_smallvilleIA" compset="IHistClm50BgcCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >restart is right before the transition from 100% nat veg to 100% crop</option>
</options>
</test>
<test name="ERS_Ly3_P64x2" grid="f10_f10_musgs" compset="IHistClm50BgcCropG" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Multi-year global test of transient crops together with transient glaciers. Use glacier evolution with ERS test</option>
</options>
</test>
<test name="ERS_Ly5_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcCropGs" testmods="clm/monthly">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">02:20:00</option>
</options>
</test>
<test name="ERS_Ly5_P256x1" grid="f10_f10_musgs" compset="IHistClm50BgcCrop" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >Want a multi-year global test of transient crops; also want a multi-year transient restart test. Using P60x1 and ERS rather than ERP to get faster turnaround of this long-running test</option>
</options>
</test>
<test name="ERS_Ly5_P128x1" grid="f10_f10_musgs" compset="IHistClm45BgcCrop" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >include a long Clm45 test, and include a production intel test of Clm45</option>
</options>
</test>
<test name="ERS_Ly6_Mmpi-serial" grid="1x1_smallvilleIA" compset="IHistClm50BgcCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
<option name="comment" >restart is right before increasing natural veg to &gt; 0 while also shifting PCT_CFT</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="LII_D_Ld3" grid="f19_g17_gl4" compset="I2000Clm50BgcCrop" testmods="clm/glcMEC_spunup_1way">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Want to cover both glc_mec and crop in an LII test; this test covers both. Uses a year-2000 restart file so that the restart file has non-zero product pools, so that we exercise the gridcell-level code in init_interp. 2018-04-09: Now that SGLC tests use glc_mec, it would be more straightforward to run this test using a SGLC compset rather than a CISM compset that turns off two-way coupling; I was going to make that change now, but didn't want to risk it given the current time crunch, so let's make that change later.</option>
</options>
</test>
<test name="LII2FINIDATAREAS_D_P384x2_Ld1" grid="f09_g16_gl4" compset="I1850Clm50BgcCrop" testmods="clm/compatible_finidat_f09">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Exercise the init_interp_method='use_finidat_areas' option. See documentation at the top of the python script implementing this test for more details and rationale.</option>
</options>
</test>
<test name="LVG_Ld5_D" grid="f10_f10_musgs" compset="I1850Clm50Bgc" testmods="clm/no_vector_output">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include one LVG debug test (exact configuration is not very important). Note that the LVG test will fail if there is any 1-d output, or output separated by glacier elevation classes (e.g., the various *_FORC fields), so this includes a testmod that turns off any 1-d output.</option>
</options>
</test>
<test name="LCISO_Lm13" grid="f10_f10_musgs" compset="IHistClm50BgcCrop" testmods="clm/ciso_monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
<option name="comment" >Make sure Carbon isotopes on and off with land-use change, does NOT change answers</option>
</options>
</test>
<test name="NCK_Ld1" grid="f10_f10_musgs" compset="I2000Clm50Sp" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="PEM_D_Ld5" grid="ne30_g16" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:60:00</option>
</options>
</test>
<test name="PEM_Ld1_P96x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/crop">
<machines>
<machine name="izumi" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >2-node test on izumi with production compiler checking that different processor count gives the same answers</option>
</options>
</test>
<test name="PET_P64x2_D" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >The main purpose of this test is to test threading of init_interp, exercising the OpenMP directives in initInterp. (Note that ERP tests don't compare threaded vs. non-threaded runs of init_interp, since init_interp won't run in the restart case.) Note that this test will use init_interp as long as we don't have out-of-the-box initial conditions at f10 resolution. We could probably get a similar level of confidence in the threading directives by deleting this test and instead changing the LII test to use threading; the main loss would be that that wouldn't test threading combined with interpolating from one resolution to another, as this one does.</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="SMS" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/crop">
<machines>
<machine name="izumi" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D" grid="f09_g16" compset="I1850Clm50BgcSpinup" testmods="clm/cplhist">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D" grid="f19_f19_mg17" compset="I2010Clm50Sp" testmods="clm/clm50cam6LndTuningMode">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS" grid="f19_g17" compset="I2000Clm50Cn" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include at least one production test with Cn</option>
</options>
</test>
<test name="SMS_D" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/crop">
<machines>
<machine name="izumi" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1" grid="f19_g17" compset="I1850Clm45Cn" testmods="clm/default">
<machines>
<machine name="izumi" compiler="gnu" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1" grid="5x5_amazon" compset="I2000Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_Mmpi-serial" grid="1x1_vancouverCAN" compset="I1PtClm45SpGs" testmods="clm/default">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_Mmpi-serial" grid="1x1_mexicocityMEX" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_Mmpi-serial" grid="1x1_vancouverCAN" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_Mmpi-serial" grid="f45_f45_mg37" compset="I2000Clm50SpGs" testmods="clm/ptsRLA">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
<machine name="izumi" compiler="nag" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_P48x1" grid="f10_f10_musgs" compset="I2000Clm45BgcCrop" testmods="clm/oldhyd">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld1_P48x1" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/af_bias_v7">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f19_f19_mg16" compset="I1850Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="clm_short"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
<machine name="derecho" compiler="intel" category="aux_cime_baselines"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f19_f19_mg16" compset="I2000Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f10_f10_musgs" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f09_g16" compset="I1850Clm40CnGswGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_N2_D_Lh12" grid="f09_g16" compset="I2000Clm50SpGs" testmods="clm/pauseResume">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="DAE_N2_D_Lh12" grid="f10_f10_musgs" compset="I2000Clm50BgcCropGs" testmods="clm/DA_multidrv">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld3" grid="f19_f19_mg16" compset="IHistClm40CnCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld5" grid="f10_f10_musgs" compset="I1850Clm45BgcCrop" testmods="clm/crop">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a nag debug test of Clm45BgcCrop</option>
</options>
</test>
<test name="SMS_D_Ld5_Mmpi-serial" grid="1x1_mexicocityMEX" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="SMS_D_Lm1_Mmpi-serial" grid="CLM_USRDAT" compset="I1PtClm50SpGs" testmods="clm/USUMB">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="SMS_D_Ly2" grid="1x1_numaIA" compset="IHistClm50BgcCropGs" testmods="clm/ciso_bombspike1963">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">03:40:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="SMS_D_Ly2" grid="1x1_brazil" compset="IHistClm50BgcQianGs" testmods="clm/ciso_bombspike1963">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">03:40:00</option>
<option name="tput_tolerance">0.5</option>
</options>
</test>
<test name="SMS_D_Ly6_Mmpi-serial" grid="1x1_smallvilleIA" compset="IHistClm45BgcCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">02:00:00</option>
<option name="comment" >Want a debug test that tests a number of aspects of transient crops, including a new crop landunit and shifting PCT_CFT; move to CLM50 once we can get it fast enough (see bug 2391)</option>
</options>
</test>
<test name="SMS_D_P48x1_Ld5" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/irrig_spunup">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Want nag _D test with irrigation on</option>
</options>
</test>
<test name="SMS_Ld1" grid="f09_g16" compset="I1850Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1" grid="f19_f19_mg16" compset="I2000Clm40SpCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1" grid="f09_g17" compset="I2000Clm50BgcCruGs" testmods="clm/af_bias_v7">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1" grid="f19_g17" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1" grid="f19_g17" compset="I2000Clm50Vic" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1" grid="f19_f19_mg16" compset="IHistClm40CnCruGs" testmods="clm/40default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1_Mmpi-serial" grid="1x1_mexicocityMEX" compset="I1PtClm50SpGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1_Mmpi-serial" grid="f45_f45_mg37" compset="I2000Clm50SpGs" testmods="clm/ptsRLA">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1_Mmpi-serial" grid="f45_f45_mg37" compset="I2000Clm50SpGs" testmods="clm/ptsRLB">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld1_Mmpi-serial" grid="f45_f45_mg37" compset="I2000Clm50SpGs" testmods="clm/ptsROA">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld2" grid="T31_g37" compset="IHistClm40CnGswGs">
<machines>
<machine name="izumi" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="I1850Clm45BgcCrop" testmods="clm/crop">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >include a production test of Clm45</option>
</options>
</test>
<test name="SMS_Ld5" grid="f45_f45_mg37" compset="I2000Clm40SpCruGs" testmods="clm/40ptsRLB">
<machines>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f19_g17" compset="IHistClm50Bgc" testmods="clm/decStart">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5_D" grid="f09_g17" compset="I1850Clm50BgcCropCmip6" testmods="clm/basic">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >This gives a short debug test of the cmip6 configuration as well as a test of the cmip6 configuration at the production resolution, both of which we want. This test needs to use init_interp to work, because of adding virtual Antarctica columns (currently the default out-of-the-box setting uses init_interp for this). Note, use of basic testmod her means no output will happen</option>
</options>
</test>
<test name="SMS_Ld5_D" grid="f09_g17" compset="IHistClm50BgcCrop" testmods="clm/smyle_hist">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Add a test of the smyle transient use-case</option>
</options>
</test>
<test name="SMS_Ld5_D" grid="f09_g17" compset="I1850Clm50BgcCrop" testmods="clm/smyle_1850">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Add a test of the smyle 1850 use-case</option>
</options>
</test>
<test name="SMS_Ld1" grid="f19_g17" compset="I1850Clm50BgcCropCmip6" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >This gives a short test of the cmip6 configuration for 2-degree which turns Carbon isotopes off. Use of default testmod will modify the CMIP6 standard history output for first two files.</option>
</options>
</test>
<test name="SMS_Ld5_D_P48x1" grid="f10_f10_musgs" compset="IHistClm50Bgc" testmods="clm/monthly">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5_D_P48x1" grid="f10_f10_musgs" compset="IHistClm50Bgc" testmods="clm/decStart">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="ISSP585Clm50BgcCrop" testmods="clm/ciso_dec2050Start">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="aux_cime_baselines"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient production low res future scenario SSP5-8.5 case with isotopes with a december 2050 start</option>
</options>
</test>
<test name="SMS_Ld5" grid="f09_g17" compset="ISSP585ExtClm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient production future scenario SSP5-8.5 extension case</option>
</options>
</test>
<test name="SMS_Ld5" grid="f09_g17" compset="ISSP370ExtClm50BgcCrop" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Control 2100 production future scenario SSP3-7.0 extension case</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="ISSP245Clm50BgcCrop" testmods="clm/ciso_dec2050Start">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient production low res future scenario SSP2-4.5 case with isotopes with a december 2050 start</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="ISSP370Clm50BgcCrop" testmods="clm/ciso_dec2050Start">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Transient production low res future scenario SSP3-7.0 case with isotopes with a december 2050 start</option>
</options>
</test>
<test name="SMS_Lm1" grid="f09_g17_gl4" compset="I1850Clm50Bgc" testmods="clm/clm50KitchenSink">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Lm1" grid="f19_g17_gl4" compset="I1850Clm50Bgc" testmods="clm/clm50dynroots">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Lm1_D" grid="f10_f10_musgs" compset="I2000Clm50BgcCrop" testmods="clm/snowlayers_3_monthly">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >nlevsno less than 5 is not important scientifically, but is useful for making sure no code assumes that there are 5 snow layers (because this should result in an array bounds exception); this test can be removed once CLM5 is released and most new branches are based off of CLM5 (which will have a runtime-set number of snow layers, rather than assuming 5 snow layers)... until then, I want this test to catch any new code that assumes 5 snow layers</option>
</options>
</test>
<test name="SMS_Lm13" grid="f19_g17" compset="I2000Clm50BgcCrop" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
<option name="comment" >include a relatively long crop test at relatively high resolution</option>
</options>
</test>
<test name="SMS_Lm37" grid="f10_f10_musgs" compset="I1850Clm50SpG" testmods="clm/glcMEC_long">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
<option name="comment" >Long enough test for SMB to be generated in bare land areas; add a month beyond the 3rd year to allow time for CLM to respond to CISM forcing from the 3rd year. (Note: if we had spun-up initial conditions for an IG compset, we could test this with much shorter test, if it also used the glc override options - much of the need for this long test is to allow the snow pack to spin up.)</option>
</options>
</test>
<test name="SMS_Ly3_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcCropGs" testmods="clm/clm50dynroots">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
</options>
</test>
<test name="SMS_Ly3_Mmpi-serial" grid="1x1_numaIA" compset="I2000Clm50BgcDvCropQianGs" testmods="clm/cropMonthOutput">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">01:40:00</option>
</options>
</test>
<test name="SMS_P48x1_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Cn" testmods="clm/default">
<machines>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Include a few debug tests of Cn</option>
</options>
</test>
<test name="SSP_D_Ld10" grid="f19_g17" compset="I1850Clm50Bgc" testmods="clm/rtmColdSSP">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SSP_D_Ld4" grid="f09_g17" compset="I1850Clm50BgcCrop" testmods="clm/ciso_rtmColdSSP">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SSP_Ld10" grid="f19_g17" compset="I1850Clm50Bgc" testmods="clm/rtmColdSSP">
<machines>
<machine name="izumi" compiler="intel" category="prebeta"/>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Mmpi-serial_Ld5" grid="5x5_amazon" compset="I2000Clm45FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Mmpi-serial_Ld5" grid="5x5_amazon" compset="I2000Clm50FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f09_g17" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f09_g17" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Mmpi-serial_Ld5" grid="1x1_brazil" compset="I2000Clm45FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Mmpi-serial_Ld5" grid="5x5_amazon" compset="I2000Clm45FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Mmpi-serial_Ld5" grid="1x1_brazil" compset="I2000Clm50FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Mmpi-serial_Ld5" grid="5x5_amazon" compset="I2000Clm50FatesGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld5" grid="f45_f45_mg37" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="izumi" compiler="nag" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Ld5" grid="f45_f45_mg37" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_D_Lm6" grid="f45_f45_mg37" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="SMS_D_Lm6" grid="f45_f45_mg37" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="SMS_D_Lm6_P256x1" grid="f45_f45_mg37" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f19_g17" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f10_f10_musgs" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Ld5" grid="f19_g17" compset="I2000Clm50Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_D_Ld3" grid="f19_g16" compset="I2000Clm50FatesCruGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERP_D_P32x2_Ld3" grid="f19_g16" compset="I2000Clm50FatesCruGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld3" grid="f09_g16" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERP_Ld9" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/FatesAllVars">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld3" grid="f19_g16" compset="I2000Clm50FatesCruGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="f19_g16" compset="I2000Clm50BgcCruGs" testmods="clm/default">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >Run a short non-Fates test (without land-ice model) in the fates test list, to make sure fates changes do not mess up the standard model</option>
</options>
</test>
<test name="ERS_D_Mmpi-serial_Ld5" grid="1x1_brazil" compset="I2000Clm50FatesCruGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Lm3_D_Mmpi-serial" grid="1x1_brazil" compset="I2000Clm50FatesCruGs" testmods="clm/FatesHydro">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_D_Ld5" grid="1x1_brazil" compset="I2000Clm50FatesCruGs" testmods="clm/FatesHydro">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_Ld5" grid="f19_g16" compset="I2000Clm45Fates" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="ERS_Ld60" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/Fates">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_Ld60" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/FatesNoFire">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_Ld60" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/FatesST3">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_Ld60" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/FatesPPhys">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="ERS_Ld60" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/FatesLogging">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="izumi" compiler="nag" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="SMS_Lm6" grid="f45_f45_mg37" compset="I2000Clm50FatesCruGs" testmods="clm/Fates">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
</options>
</test>
<test name="SMS_Lm13" grid="1x1_brazil" compset="I2000Clm50FatesCruGs" testmods="clm/FatesColdDef">
<machines>
<machine name="derecho" compiler="intel" category="fates"/>
<machine name="lawrencium-lr3" compiler="intel" category="fates"/>
</machines>
<options>
<option name="wallclock">00:40:00</option>
</options>
</test>
<test name="SMS_Lm1" grid="f10_f10_musgs" compset="I1850Clm50BgcCropCmip6waccm" testmods="clm/basic">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:20:00</option>
<option name="comment" >The main point of this test is simply to make sure that the CMIP6WACCMDECK moifierd works. (This configuration is basically the same as I1850Clm50BgcCropCmip6, but without cmip6_glaciers_virtual_antarctica - so we don't need huge coverage of this.) Month-long so that we actually get some history output (because this test exercises a usermods directory with only monthly and yearly output).</option>
</options>
</test>
<test name="SMS_Lm1" grid="f19_g17" compset="I1850Clm50BgcCropCmip6waccm" testmods="clm/basic">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm"/>
<machine name="derecho" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock">00:60:00</option>
<option name="comment" >The main point of this test is simply to make sure that the CMIP6WACCMDECK modifier works for
2-degree since that resolution turns off Carbon isotopes </option>
</options>
</test>
<test name="SMS_Lm1_D" grid="f10_f10_musgs" compset="I1850Clm50BgcCrop" testmods="clm/output_crop_highfreq">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm">
<options>
<option name="wallclock">00:20:00</option>
<option name="comment">Want at least a month-long debug test covering the output_crop usermod, as well as a test covering the output_crop_highfreq usermod. (Note that we already have a year+ test of output_crop via a cmip6 test, so having this test just be a month, rather than a year, seems good enough.)</option>
</options>
</machine>
</machines>
</test>
<test name="SMS_Ly1_Mmpi-serial" grid="1x1_brazil" compset="IHistClm50BgcQianGs" testmods="clm/output_bgc_highfreq">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm">
<options>
<option name="wallclock">00:20:00</option>
<option name="comment">Want a year-long test covering the output_bgc and output_bgc_highfreq usermods; don't want a highfreq, year-long global test because of the output volume, so this is single-point.</option>
</options>
</machine>
</machines>
</test>
<test name="SMS_Ly1_Mmpi-serial" grid="1x1_vancouverCAN" compset="I1PtClm50SpGs" testmods="clm/output_sp_highfreq">
<machines>
<machine name="derecho" compiler="intel" category="aux_clm">
<options>
<option name="wallclock">00:10:00</option>
<option name="comment">Want a year-long test covering the output_sp and output_sp_highfreq usermods; don't want a highfreq, year-long global test because of the output volume, so this is single-point.</option>
</options>
</machine>
</machines>
</test>
</testlist>
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